Chapter 1: Introduction to Computer Systems
2. Which five layers are composed of the 5-layer hierarchy of the computer system from bottom to top? Which are physical machines and which are virtual machines?
1) Microprogram machine, traditional machine, operating system machine, assembly language machine, high-level language machine
2) Microprogram machines and traditional machines are physical machines, while others are virtual machines.
3. In the computer system structure, what is translation? What is the explanation?
1) Translation: Translate all programs written in one language into another language and then execute them;
2) Explanation: Translate a statement of a program written in one language into one or more statements in another language, and then execute it. After executing this language, explain the next one.
4. What is computer architecture? What is computer composition? Take multiplication instructions as an example to illustrate the difference between the two.
1) Computer architecture refers to the properties of computers that can be seen by programmers. Such as instruction sets, data types, etc.
2) Computer composition refers to how to realize the attributes reflected in computer architecture;
3) Taking multiplication instructions as an example, whether a computer has multiplication instructions is a question of architecture. Whether the multiplication instruction uses a dedicated multiplier or uses an adder and a shifter is a computer-based problem.
5. What are the main features of the von Neumann machine?
1) The computer consists of five parts: an arithmetic device, memory, controller, input device and output device;
2) Instructions and data are stored in memory and can be accessed by address;
3) The instructions and data are expressed in binary;
4) The instruction is composed of an operation code and an address code. The operation code indicates the nature of the operation, and the address code indicates the position of the operand in the memory;
5) The instructions are stored in the memory in sequence, usually taken out and executed in an automatic order;
6) The machine is centered on the calculator, and the I/O device and memory exchange data through the calculator. (So, later there was a memory-centric computer structure)
6. Draw a block diagram of a modern computer.
P10, Figure 1.9
7. What are storage units, storage words, storage words, and storage bodies?
Storage unit: a storage unit that stores a storage word and has a specific storage address;
Storage word: All binary data stored in a storage unit, access the binary data obtained by a storage unit according to a certain address.
Storage word length: the number of bits of binary data in the word, that is, the number of bits of binary data obtained by accessing a certain storage unit according to a certain address;
Memory bank: a memory device composed of multiple memory cells.
8. In main memory, what is MAR and what is MDR and what determines the maximum capacity of the memory?
1) MAR: Storage address register, which saves the address of the storage unit that needs to be accessed. Reflects the number of storage units.
2) MDR: Store data registers and cache data read/write to the storage unit. Reflects the storage word length.
3) The maximum memory capacity is determined by the number of bits in the MAR register and the number of bits in the MDR register.
9. What is the length of the machine word and what is the length of the storage word?
Machine word length: the number of bits of binary data that the CPU can process at a time.
Storage word length: the number of bits of binary data obtained by accessing a certain storage unit according to a certain address.
10. Assuming that the number of bits in the MAR register is 16 bits and the number of bits in the MDR register is 16 bits, what is the maximum capacity of the memory?
1) The number of bits in the MAR register is 16 bits, and the number of addresses that can be represented is 16th to the power of 2, which is 64K;
2) The number of bits in the MDR register is 16 bits, which means that the storage word length is 16 bits, that is, 2 bytes;
3) The maximum memory capacity is 64K * 2B = 128K Byte
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Chapter 3 System Bus
1. Why use the bus?
In the von Neumann structure, there are separate connections between each component, which not only has many lines, but also makes it difficult to expand I/O devices. That is, to expand an I/O device, it requires connecting many wires.
Therefore, a bus connection method is introduced, and multiple devices are connected on the same group of buses to form a common transmission channel between devices.
2. What are the two basic characteristics of the bus?
1) Sharing: Multiple components are connected to the same group of buses, and data exchange between each component through this bus.
2) Time-sharing: At the same time, only information sent by one component can be transmitted on the bus;
3. What categories does the system bus divide into according to the transmission information? Is it one-way or two-way?
1) Divided into data bus, address bus and control bus.
2) Data bus: transfer data information between various functional components, and transmit in both directions;
3) Address bus: used to indicate the address of the main memory unit on the data bus, the source data or destination data is located. One-way: issued by the CPU
4) Control bus: used to send various control signals. For a single wire in the control bus, it is unidirectional, that is, it can only be sent from one component to another component. In a set of control buses, there are inputs and outputs, so the control bus can also be regarded as bidirectional.
3. What are bus width, bus bandwidth, bus multiplexing, and number of signal lines?
1) Bus width: The number of roots of the data bus, generally a multiple of 8. It is an important indicator for measuring the performance of computer systems;
2) Bus bandwidth: that is, the bus data transmission rate, the maximum amount of bytes that can be transmitted per second on the bus.
3) Bus multiplexing: One signal line transmits two signals in time. For example, time-sharing multiplexing of data bus and address bus;
4) Number of signal lines: the sum of the lines of the three buses: address bus, data bus and control bus.
4. Assuming that the bus's operating frequency is 33MHz and the bus width is 32 bits, what is its maximum transmission rate?
33 * （32/8） = 132 MB/s
5. Briefly explain the concept and shortcomings of single bus structure? (Why should modern computers adopt multi-bus structure?)
In a single bus structure, all components (CPU, main memory, I/O devices) are connected to a group of buses.
However, all information transmission must be passed through this group of buses, and only one component can send information to the bus, causing the bus to become a bottleneck in the system.
Therefore, a multi-bus structure has been developed, and the basic idea is to hook devices with similar speeds on the same set of buses, and the buses are connected through a bus controller.
For example, between the CPU and the Cache, between the I/O device, etc.
6. What are the three ways of centralized bus arbitration control, and which method cannot be changed in priority?
1) Chain query, counter timed query, and independent request.
2) The priority of chain query cannot be changed, and the priority closest to the controller is the highest.
7. Briefly describe the working principles of chain query, counter timed query and independent request.
(slightly)
8. What is a bus cycle and what stages are divided into?
1) Bus cycle: Two components on the bus complete a complete and reliable data transmission time;
2) It is divided into four stages:
Application allocation phase: Application bus
Addressing phase: Issuing address and related commands
Transfer phase: perform data exchange
End: Remove the signal from the bus and leave the bus
9. What is bus communication control and what are the types of bus communication control?
1) Bus communication control: solves how both parties to the communication know the start and end of transmission, and how to coordinate and cooperate;
2) Synchronous communication, asynchronous communication, semi-synchronous communication, and separate communication
10. What is synchronous communication? What are its advantages and disadvantages?
1) Synchronous communication: Each component on the bus is controlled by a unified clock signal; in the bus cycle, there are clear regulations on how each component operates in each clock cycle.
2) Advantages: fast speed, simple coordination between each module
3) Disadvantages: Designing the common clock with the slowest components on the bus will affect bus efficiency.
11. What is asynchronous communication? What are the types of asynchronous communication?
1) Asynchronous communication: There is no unified clock standard for each component on the bus, and responsive communication is adopted; (After the main module issues a request, it waits until the slave module feedbacks the reply signal before starting communication)
2) Non-interlocking, semi-interlocking, and fully interlocking. (You need to understand the meaning of various methods)
12. What is baud rate? What is bit rate? (You need to master how to calculate the baud rate and bit rate)
Baud rate: the number of bits of binary data transmitted in unit time, unit bps
Bit rate: The number of valid binary bits transmitted per unit time.
13. What are the parameters that need to be set in general during asynchronous communication?
Baud rate, stop bit (1/2/1.5), check bit (odd check, even check, no check)
14. Briefly describe the basic principles of semi-synchronous communication.
Semi-synchronous communication combines synchronous communication and asynchronous communication.
Synchronous communication: Use a unified clock, which specifies what to do in a certain clock cycle;
Asynchronous communication: If the slave module is not ready, add a "wait for response" signal.
15. Briefly describe the basic principles of separate communication.
After the main module issues the address and command, the bus is abandoned, so that the bus can be used by other devices during the slave module's preparation of data. Improve bus utilization.
However, this method of control is more complicated.
16. Can parity check be corrected? Can Hanming code correct error codes?
1) Parity check can only detect errors, but cannot be corrected.
2) Hamming code can correct errors.
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Chapter 4 Memory
1. What four types of memory can be divided into according to the access method? Which belongs to random access memory and which belongs to serial access memory?
1) It can be divided into random memory, read-only memory, sequential memory and direct memory;
2) Random memory and read-only memory belong to random memory, that is, the access time has nothing to do with the physical address;
3) Sequential memory (typical like tape) and direct memory (typical like disk) belong to serial memory, that is, the access time is related to the physical address.
2. Which three indicators are used to measure the use of memory? Which one is the fastest among registers, caches, and main memory? Which one is the cheapest?
1) Speed, capacity, and price.
2) Register speed is the fastest and main memory is the cheapest.
3. What are the two common storage system hierarchies? How transparent? What problems do they use to solve?
1) Cache-main memory level: used to alleviate the problem of mismatch between CPU and main memory speed. It is done by hardware and is completely transparent to all programmers.
2) Main memory-super memory level: used to solve the problem of insufficient main memory capacity. It is completed by the operating system and hardware. It is transparent to the application designer and opaque to the system programmer.
(Now, memory can be accessed by word or by bytes. Therefore, when memory is addressed, each byte has an independent address.)
4. There are two storage methods for words in the storage unit, the big-end method and the small-end method. What does each mean? What storage method does x86 use?
1) Big-endian method: The low bit of a word is located in the high address of the memory, while the high bit of a word is located in the low address of the memory;
2) Little-endian method: The low bit of a word is located in the low address of the memory, while the high bit of a word is located in the high address of the memory.
3) x86CPU adopts a small-endian approach.
5. Three main technical indicators of main storage
Storage capacity, access speed and storage bandwidth
6. What is the access time? What is the access cycle? Which one is bigger?
1) Access time: the time required to start the memory and complete this operation (read or write);
2) Access period: the minimum interval time required to start the memory twice in a row;
3) The access period includes the access time;
7. What is memory bandwidth? (To understand how to calculate memory bandwidth)
The amount of information accessed by memory within unit time;
8. What are the two methods of semiconductor memory chip decoding driver? Please briefly explain.
1) Line selection method: All address chips are decoded through a decoder, and the bits of a memory cell are selected, which are suitable for chips with small storage capacity;
2) Overcome law: divide the address into two groups, each group is decoded through a decoder, and select rows or columns. The intersection of rows and columns is the memory bit to be accessed.
9. What are the two categories of random memory? Which one needs refresh? Please make a brief comparison from the aspects of speed, capacity, price, etc.
1) Static RAM: implemented using latch principle;
2) Dynamic RAM: It is implemented using capacitance principle and needs to be refreshed.
3) Compared with dynamic RAM, static RAM is fast, has a small capacity and is high in price. It is generally used for cache, while dynamic RAM is generally used for memory.
10. What are the types of read-only memory?
1) Mask ROM (MROM): The content cannot be changed after leaving the factory.
2) PROM: programmable read-only memory, which can be programmed at one time;
3) EPROM: Erasable read-only ROM and irradiate with ultraviolet rays;
4) EEPROM: Electrically erasable read-only ROM.
6) FLash Memory: non-volatile memory using EEPROM.
11. The capacity of a single-chip memory chip is limited and it is difficult to meet actual needs. Therefore, several memory chips must be connected together to form a memory of sufficient capacity.
Memory expansion usually includes bit expansion and word expansion. What is word expansion and what is bit expansion? Please give an example and brief description
1) Bit expansion: Increase the word length of the memory, for example, two 1K*4-bit memory chips form 1 1K*8-bit memory;
2) Word expansion: Increase the number of words in the memory, for example, two 1K*8-bit memory chips form 1 2K*8-bit memory;
Usually, word expansion and bit expansion are used in a mixed way.
12. Be careful to master the expansion of memory, including address space allocation, address line connection, data line connection, chip selection signal generation and connection, etc.;
See page P94, Example 4.1
13. Assume that the binary code to be detected is n bits, in order to have 1 bit error correction ability, a K bit detection bit needs to be added to form a n+k bit code. Question, how many detection bits should be added?
The number of detection bits to be added: 2 is greater than or equal to n+k+1 to the power of k.
Because to make it have 1-bit detection capability, k-bits must be used to explain which bit n+k is wrong. The number of k-bits that can be expressed is 2 to the power of k, and which bit n+k is exactly which bit n+k is exactly
There is an error or all of them are correct, and there are a total of n+k+1 conditions. Therefore, the value of k needs to meet: 2 is greater than or equal to n+k+1
14. For Hamming code, you should be proficient in the encoding method of Hamming code (according to the principle of spouse or odd-matching), and give Hamming code to obtain the original information to be transmitted (including the error correction process).
15. Three ways to improve the speed of memory access.
1) Use high-speed components;
2) Adopt storage hierarchy: cache-main memory structure;
3) Adjust the main memory structure: including two methods: single-body multi-word and multi-body parallelism.
16. Briefly describe the working principle and its advantages of a single-body multi-word storage system.
1) The single multi-word storage system accesses multiple CPU words at one time, that is, the storage word is n times the CPU words (assuming that n CPU words are retrieved in one visit).
2) Advantages are: significantly improve memory bandwidth.
17. What are the two addressing methods for multi-body parallel systems? Please briefly explain its addressing method and its advantages.
1) High-bit cross-addressing method: The addressing method of the memory bank is sequential storage, that is, after one memory bank is full, it is stored in the next one; the high bit of the memory unit address is the number of the memory bank.
High-bit cross-addressing cannot improve the speed of single memory access, but it can enable multiple applications to access memory in parallel and improve the concurrency of the system.
2) Low-bit cross-addressing method: The addressing method of the memory bank is cross-storage. That is, the program is continuously stored in adjacent storage banks. The low bit of the memory cell address is the number of the memory bank.
Low-bit cross-addressing can significantly improve the speed of single memory access.
19. In four-bit low-bit cross-addressing, assuming that the access period is T and the bus transmission period is τ, what conditions should be met in order to realize pipeline storage? If you read four words in succession, how much time will it take?
1）T= 4τ
2) Read four words in succession, the time required is T + (4-1)τ
Note: Assume that it is not a low-bit cross-addressing, but a high-bit cross-addressing, the time required to continuously read four words is still 4T.
20. Everyone needs to master the calculation method of memory bandwidth in the case of high-bit cross-addressing (sequential storage) and low-bit cross-addressing (cross storage).
21. Reasons for introducing cache between CPU and memory.
1) Avoid CPU empty I/O storage access;
2) Alleviate the problem of mismatch between CPU and main memory speed.
22. What is the principle of locality of a program.
The CPU accesses instructions or data from the main memory for a certain period of time, only accesses the main memory local address area.
23. Calculation of Cache hit rate, average access time and access efficiency.
24. What are the two ways to write Cache?
1) Direct writing method: write operations both into the cache and main memory;
2) Write back method: only write data to the cache without writing to the main memory, and only write to the main memory after the data in the cache is replaced.
25. Mapping the main memory address to the Cache address is called address mapping. What are the common Cache mapping methods?
Direct mapping, full-associated mapping, group-associated mapping.
26. What are the advantages and disadvantages of direct mapping?
Advantages: Fast address conversion speed. Disadvantages: The cache utilization rate is not high and the block conflict rate is high;
27. What are the advantages and disadvantages of fully connected mapping?
Advantages: High cache utilization rate and low block conflict rate. Disadvantages: Address transformation is complex and requires more hardware.
28. Everyone needs to master various mapping methods to write down the main memory address format, cache address format, and conversion of main memory address to cache address.
29. What are the commonly used replacement algorithms in Cache? Which hits the highest rate?
1) First-in, least used algorithms and random replacement algorithms in the near future;
2) The highest hit rate is the least used algorithm in the near future;
30. What are the three-address structures of the disk?
Cylinder, head number and sector number
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Chapter 5 Input and Output System
1. What are the four stages of the development of I/O systems?
1) Early stage (dispersed connections, serial work, program query)
2) Interface module and DMA stage (bus connection, parallel operation, interruption and DMA)
3) Channel stage (channel is a processor with special functions)
4) I/O processor stage
The development of I/O systems is actually a process of gradually liberating CPUs from heavy I/O work;
2. What are the two ways to address I/O device? What are the advantages and disadvantages of each?
1) Unified addressing method: Uniform addressing with memory, the I/O address is part of the memory address; no dedicated I/O instructions are required, but they occupy memory space.
2) Independent addressing method: separate addressing from the storage address, special I/O instructions are required.
3. What are the contact information between I/O devices and hosts?
When interacting with information between I/O devices and hosts, they must understand each other's status. According to the working speed of I/O devices, it can be divided into three categories:
1) Immediate response: Applicable to slow devices regardless of its status (that is considered to be ready at all times).
2) Response signal: interact through the response signal;
3) Synchronous time scale: Use a unified clock signal.
4. What are the four types of I/O buses?
Data line, device selection line, status line, command line
5. I/O devices usually use D triggers (complete triggers) and B triggers (work triggers) to identify the state of the device.
D=0, B=0: pause status;
D=0, B=1: Ready state
D=1, B=0: Ready state
6. Basic working principle of program query.
The CPU constantly checks the status of the I/O device, causing the CPU and I/O device to work serially.
7. What is interruption?
When the computer executes the program, when an exception is cleared or special request occurs, the computer stops the running of the current program and turns to process these abnormal cleared or special requests. After the processing is completed, it returns to the interruption of the current program and continues to execute the original program, which is an interrupt.
8. What are the four parts of the basic process of interrupting service procedures?
1) Protect the site
2) Interrupt service
3) Recover the site
4) Interrupt return
9. What are single-point interrupts and multiple interrupts?
1) Single-fold interrupt: The current interrupt service procedure is not allowed;
2) Multiple interrupts: allows higher-level interrupt sources to interrupt the current interrupt service program, also known as interrupt nesting;
10. The timing of the CPU response interruption?
After the current instruction is executed, the CPU sends an interrupt query signal, that is, the interrupt response must be performed after each instruction is executed, and it is impossible to respond to interrupts during the instruction execution.
11. What is DMA?
DMA: Direct memory access. Establish an independent bus connection between main memory and I/O devices.
12. In the DMA method, since the DMA interface shares main memory with the CPU, there may be a conflict between the two competing for main memory. In order to resolve the conflict, what three working methods are usually used when DMA and main memory exchange data?
1) Stop CPU access to main memory: DMA memory access priority is high;
2) Periodic misappropriation (steal): DMA misappropriates storage or steals one or several main storage access cycles;
3) DMA and CPU alternate access: divide the CPU working cycle into two parts, part for DMA access, and part for CPU access.
13. What three parts does the DMA work process include?
1) Pre-processing
2) Data transmission
2) Post-processing
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Chapter 6 Computer operation method
1. Master the calculation method of the signed number and find the true value through the original code;
2. Master the method of compensating the complement code, and the method of finding the original code through complement code and then finding the true value.
1) Find the complement code through the original code: the symbol bit remains unchanged, everyone takes inverse, and the last bit is added 1;
2) Find the original code through complement code: the symbol bit remains unchanged, everyone takes inverse, and the last bit is added 1;
3. There are 2 representation methods for 0 in the original code (positive zero and negative zero), and there is only one representation method for 0 in the complement code (positive zero and negative zero are consistent)
4. Suppose that the number of bits of the symbol is 8 (including the symbol bits), the range of truth values that the complement code can represent?
The true value range that can be represented by the complement code is -128~+127 (see the complement code definition)
5. Master the methods of inverse code and shift code.
6. What is a fixed-point representation? What is a floating point representation?
1) Fixed point representation: the number where the decimal point is fixed at a certain position is a fixed point number;
2) Floating point represents: a number where the decimal point can float.
7. What parts does the representation of floating point numbers in a machine consist of?
It consists of four parts: mantissa, number, order code, and order symbol.
8. Master the calculation method of the standardized floating-point number representation range (maximum positive number, minimum positive number, maximum negative number, minimum negative number).
9. What parts does the floating point number specified in the IEEE754 standard consist of?
It consists of number characters, order codes (including order characters) and mantissa.
10. In the floating point numbers specified in the IEEE754 standard, what form does the order code and mantissa be represented in?
The order code is represented by a shift code, its offset is 2^(n-1), and the mantissa is represented by the original code.
11. How many places does float occupy? How many places does double occupy?
float is a short real number, accounting for 32 bits, including 8 bits of the order code and 23 bits of the mantissa.
The double is a real number, accounting for 64 bits, of which the order code occupies 11 bits and the mantissa is 52 bits.
12. Perform arithmetic shifts on positive numbers. When the positive numbers use source code, complement code, and reverse code, when shifting left or right, what code is added to the low or high position?
For positive numbers, the source code, complement code, and inverse code are all equal to the true value. When shifting left, 0 is added to the low position, and when shifting right, 0 is added to the high position.
13. Perform arithmetic shifts on negative numbers. When negative numbers use source code, complement code, and reverse code, when shifting left or right, what code is added to the low or high position?
For source code, when moving left or right, both the low or high positions are added to 0;
For complement: when moving left, add 0 at the low position, and when moving right, add 1 at the high position
For inverse code: when shifting left or right, add 1 to both the low or high;
14. What is logical shift?
Logical shift is a shift to an unsigned number. Since there is no sign bit in the unsigned number, when shifting left, the high displacement is lost and the low displacement is filled with zero. When moving right, the low displacement is lost and the high position is zero.
15. Under what circumstances can overflow occur during addition and subtraction? How to simply judge that an overflow occurs?
1) When adding positive numbers to positive numbers, decreasing negative numbers, adding negative numbers to negative numbers, and decreasing negative numbers to positive numbers, overflow may occur.
2) If the two numbers participating in the operation are the same (addition converted into complement), the result is different from the source operand symbol, which is an overflow.
3) If the complement uses a 1-bit sign bit, if the carry of the most significant bit and the carry of the sign bit are different, an overflow occurs.
16. Can fixed-point multiplication operations be implemented using addition and shift?
Can.
17. What steps are basically carried out in floating point addition and subtraction operations?
1) Order: align the decimal points;
2) Sum of mantissa: sum the two mantissa after the order according to fixed-point addition and subtraction operations;
3) Standardization: standardization of the mantissa;
4) Rounding: When the mantissa is right, the numerical bits are lost;
5) Overflow judgment: determine whether the result is overflowing.
18. How to determine whether the floating-point operation result overflows?
Whether the order code is beyond its representation range. (Use 2 symbol bits to determine overflow)
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Chapter 7 Command System
1. What are machine instructions? What is a command system?
1) Machine instructions: each machine language statement;
2) Instruction system: a collection of all machine instructions.
2. What two main parts does an instruction contain? Please briefly explain the functions of each part.
1) Operation code: Indicates the operation to be completed by the instruction;
2) Address code: Indicate the data or data source to which the instruction is to be operated;
3. The length of the operation code is available in fixed length and variable length. What are the advantages of each?
1) Fixed length: easy to design hardware, short instruction decoding time;
2) Variable length: compressed the average length of the opcode;
4. What devices can the address in the address code in the instruction be the address of which device?
It can be the main memory address, register address, or address of the I/O device;
5. How many addresses can be found in the instruction?
Four addresses, three addresses, two addresses, one addresses and zero addresses.
6. Suppose there are four addresses, three addresses, two addresses and one address in the instruction, how many times do each need to be retrieved?
1) Four addresses: 4 accesses;
2) Three addresses: 4 accesses;
3) Two addresses: 3 accesses;
4) One address: 2 accesses;
7. What are the advantages when registers are used instead of address code fields in the instruction word?
1) Expand the addressing range of instruction words;
2) Shorten the length of the command word;
3) Reduce the number of memory accesses
8. Why should data be aligned according to boundaries when stored in memory?
Reduce the number of memory accesses.
9. What are the two types of addressing methods?
1) Instruction addressing: the instruction address of the next instruction to be executed;
2) Data addressing: Determine the operand address of this instruction.
10. What is a formal address? What is a valid address?
1) Formal address: The address code field of the instruction usually does not represent the real address of the operand, and becomes the formal address and is denoted as A;
2) Valid address: The real address of the operand, denoted as EA, is determined by the addressing feature and formal address;
11. Understand the concepts of various addressing methods and the way to form effective addresses based on formal addresses.
Immediate addressing, direct addressing, implicit addressing, indirect addressing, register addressing, register indirect addressing, base addressing (implicit or explicit), indexed addressing, relative addressing, stack addressing
12. What is RISC? What is CISC?
RISC: thin instruction set;
CISC: Complex instruction set;
1. What two parts does a computer system consist of? What does computer system performance depend on?
A computer system is composed of "hardware" and "software". The performance of a computer is measured comprehensively based on a number of technical indicators, including various performance indicators of hardware and various functions of software.
1) The computer system consists of two parts: hardware and software.
2) Computer system performance is determined by hardware and software.2. Which five layers are composed of the 5-layer hierarchy of the computer system from bottom to top? Which are physical machines and which are virtual machines?
1) Microprogram machine, traditional machine, operating system machine, assembly language machine, high-level language machine
2) Microprogram machines and traditional machines are physical machines, while others are virtual machines.
3. In the computer system structure, what is translation? What is the explanation?
1) Translation: Translate all programs written in one language into another language and then execute them;
2) Explanation: Translate a statement of a program written in one language into one or more statements in another language, and then execute it. After executing this language, explain the next one.
4. What is computer architecture? What is computer composition? Take multiplication instructions as an example to illustrate the difference between the two.
1) Computer architecture refers to the properties of computers that can be seen by programmers. Such as instruction sets, data types, etc.
2) Computer composition refers to how to realize the attributes reflected in computer architecture;
3) Taking multiplication instructions as an example, whether a computer has multiplication instructions is a question of architecture. Whether the multiplication instruction uses a dedicated multiplier or uses an adder and a shifter is a computer-based problem.
5. What are the main features of the von Neumann machine?
1) The computer consists of five parts: an arithmetic device, memory, controller, input device and output device;
2) Instructions and data are stored in memory and can be accessed by address;
3) The instructions and data are expressed in binary;
4) The instruction is composed of an operation code and an address code. The operation code indicates the nature of the operation, and the address code indicates the position of the operand in the memory;
5) The instructions are stored in the memory in sequence, usually taken out and executed in an automatic order;
6) The machine is centered on the calculator, and the I/O device and memory exchange data through the calculator. (So, later there was a memory-centric computer structure)
6. Draw a block diagram of a modern computer.
P10, Figure 1.9
7. What are storage units, storage words, storage words, and storage bodies?
Storage unit: a storage unit that stores a storage word and has a specific storage address;
Storage word: All binary data stored in a storage unit, access the binary data obtained by a storage unit according to a certain address.
Storage word length: the number of bits of binary data in the word, that is, the number of bits of binary data obtained by accessing a certain storage unit according to a certain address;
Memory bank: a memory device composed of multiple memory cells.
8. In main memory, what is MAR and what is MDR and what determines the maximum capacity of the memory?
1) MAR: Storage address register, which saves the address of the storage unit that needs to be accessed. Reflects the number of storage units.
2) MDR: Store data registers and cache data read/write to the storage unit. Reflects the storage word length.
3) The maximum memory capacity is determined by the number of bits in the MAR register and the number of bits in the MDR register.
9. What is the length of the machine word and what is the length of the storage word?
Machine word length: the number of bits of binary data that the CPU can process at a time.
Storage word length: the number of bits of binary data obtained by accessing a certain storage unit according to a certain address.
10. Assuming that the number of bits in the MAR register is 16 bits and the number of bits in the MDR register is 16 bits, what is the maximum capacity of the memory?
1) The number of bits in the MAR register is 16 bits, and the number of addresses that can be represented is 16th to the power of 2, which is 64K;
2) The number of bits in the MDR register is 16 bits, which means that the storage word length is 16 bits, that is, 2 bytes;
3) The maximum memory capacity is 64K * 2B = 128K Byte
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Chapter 3 System Bus
1. Why use the bus?
In the von Neumann structure, there are separate connections between each component, which not only has many lines, but also makes it difficult to expand I/O devices. That is, to expand an I/O device, it requires connecting many wires.
Therefore, a bus connection method is introduced, and multiple devices are connected on the same group of buses to form a common transmission channel between devices.
2. What are the two basic characteristics of the bus?
1) Sharing: Multiple components are connected to the same group of buses, and data exchange between each component through this bus.
2) Time-sharing: At the same time, only information sent by one component can be transmitted on the bus;
3. What categories does the system bus divide into according to the transmission information? Is it one-way or two-way?
1) Divided into data bus, address bus and control bus.
2) Data bus: transfer data information between various functional components, and transmit in both directions;
3) Address bus: used to indicate the address of the main memory unit on the data bus, the source data or destination data is located. One-way: issued by the CPU
4) Control bus: used to send various control signals. For a single wire in the control bus, it is unidirectional, that is, it can only be sent from one component to another component. In a set of control buses, there are inputs and outputs, so the control bus can also be regarded as bidirectional.
3. What are bus width, bus bandwidth, bus multiplexing, and number of signal lines?
1) Bus width: The number of roots of the data bus, generally a multiple of 8. It is an important indicator for measuring the performance of computer systems;
2) Bus bandwidth: that is, the bus data transmission rate, the maximum amount of bytes that can be transmitted per second on the bus.
3) Bus multiplexing: One signal line transmits two signals in time. For example, time-sharing multiplexing of data bus and address bus;
4) Number of signal lines: the sum of the lines of the three buses: address bus, data bus and control bus.
4. Assuming that the bus's operating frequency is 33MHz and the bus width is 32 bits, what is its maximum transmission rate?
33 * （32/8） = 132 MB/s
5. Briefly explain the concept and shortcomings of single bus structure? (Why should modern computers adopt multi-bus structure?)
In a single bus structure, all components (CPU, main memory, I/O devices) are connected to a group of buses.
However, all information transmission must be passed through this group of buses, and only one component can send information to the bus, causing the bus to become a bottleneck in the system.
Therefore, a multi-bus structure has been developed, and the basic idea is to hook devices with similar speeds on the same set of buses, and the buses are connected through a bus controller.
For example, between the CPU and the Cache, between the I/O device, etc.
6. What are the three ways of centralized bus arbitration control, and which method cannot be changed in priority?
1) Chain query, counter timed query, and independent request.
2) The priority of chain query cannot be changed, and the priority closest to the controller is the highest.
7. Briefly describe the working principles of chain query, counter timed query and independent request.
(slightly)
8. What is a bus cycle and what stages are divided into?
1) Bus cycle: Two components on the bus complete a complete and reliable data transmission time;
2) It is divided into four stages:
Application allocation phase: Application bus
Addressing phase: Issuing address and related commands
Transfer phase: perform data exchange
End: Remove the signal from the bus and leave the bus
9. What is bus communication control and what are the types of bus communication control?
1) Bus communication control: solves how both parties to the communication know the start and end of transmission, and how to coordinate and cooperate;
2) Synchronous communication, asynchronous communication, semi-synchronous communication, and separate communication
10. What is synchronous communication? What are its advantages and disadvantages?
1) Synchronous communication: Each component on the bus is controlled by a unified clock signal; in the bus cycle, there are clear regulations on how each component operates in each clock cycle.
2) Advantages: fast speed, simple coordination between each module
3) Disadvantages: Designing the common clock with the slowest components on the bus will affect bus efficiency.
11. What is asynchronous communication? What are the types of asynchronous communication?
1) Asynchronous communication: There is no unified clock standard for each component on the bus, and responsive communication is adopted; (After the main module issues a request, it waits until the slave module feedbacks the reply signal before starting communication)
2) Non-interlocking, semi-interlocking, and fully interlocking. (You need to understand the meaning of various methods)
12. What is baud rate? What is bit rate? (You need to master how to calculate the baud rate and bit rate)
Baud rate: the number of bits of binary data transmitted in unit time, unit bps
Bit rate: The number of valid binary bits transmitted per unit time.
13. What are the parameters that need to be set in general during asynchronous communication?
Baud rate, stop bit (1/2/1.5), check bit (odd check, even check, no check)
14. Briefly describe the basic principles of semi-synchronous communication.
Semi-synchronous communication combines synchronous communication and asynchronous communication.
Synchronous communication: Use a unified clock, which specifies what to do in a certain clock cycle;
Asynchronous communication: If the slave module is not ready, add a "wait for response" signal.
15. Briefly describe the basic principles of separate communication.
After the main module issues the address and command, the bus is abandoned, so that the bus can be used by other devices during the slave module's preparation of data. Improve bus utilization.
However, this method of control is more complicated.
16. Can parity check be corrected? Can Hanming code correct error codes?
1) Parity check can only detect errors, but cannot be corrected.
2) Hamming code can correct errors.
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Chapter 4 Memory
1. What four types of memory can be divided into according to the access method? Which belongs to random access memory and which belongs to serial access memory?
1) It can be divided into random memory, read-only memory, sequential memory and direct memory;
2) Random memory and read-only memory belong to random memory, that is, the access time has nothing to do with the physical address;
3) Sequential memory (typical like tape) and direct memory (typical like disk) belong to serial memory, that is, the access time is related to the physical address.
2. Which three indicators are used to measure the use of memory? Which one is the fastest among registers, caches, and main memory? Which one is the cheapest?
1) Speed, capacity, and price.
2) Register speed is the fastest and main memory is the cheapest.
3. What are the two common storage system hierarchies? How transparent? What problems do they use to solve?
1) Cache-main memory level: used to alleviate the problem of mismatch between CPU and main memory speed. It is done by hardware and is completely transparent to all programmers.
2) Main memory-super memory level: used to solve the problem of insufficient main memory capacity. It is completed by the operating system and hardware. It is transparent to the application designer and opaque to the system programmer.
(Now, memory can be accessed by word or by bytes. Therefore, when memory is addressed, each byte has an independent address.)
4. There are two storage methods for words in the storage unit, the big-end method and the small-end method. What does each mean? What storage method does x86 use?
1) Big-endian method: The low bit of a word is located in the high address of the memory, while the high bit of a word is located in the low address of the memory;
2) Little-endian method: The low bit of a word is located in the low address of the memory, while the high bit of a word is located in the high address of the memory.
3) x86CPU adopts a small-endian approach.
5. Three main technical indicators of main storage
Storage capacity, access speed and storage bandwidth
6. What is the access time? What is the access cycle? Which one is bigger?
1) Access time: the time required to start the memory and complete this operation (read or write);
2) Access period: the minimum interval time required to start the memory twice in a row;
3) The access period includes the access time;
7. What is memory bandwidth? (To understand how to calculate memory bandwidth)
The amount of information accessed by memory within unit time;
8. What are the two methods of semiconductor memory chip decoding driver? Please briefly explain.
1) Line selection method: All address chips are decoded through a decoder, and the bits of a memory cell are selected, which are suitable for chips with small storage capacity;
2) Overcome law: divide the address into two groups, each group is decoded through a decoder, and select rows or columns. The intersection of rows and columns is the memory bit to be accessed.
9. What are the two categories of random memory? Which one needs refresh? Please make a brief comparison from the aspects of speed, capacity, price, etc.
1) Static RAM: implemented using latch principle;
2) Dynamic RAM: It is implemented using capacitance principle and needs to be refreshed.
3) Compared with dynamic RAM, static RAM is fast, has a small capacity and is high in price. It is generally used for cache, while dynamic RAM is generally used for memory.
10. What are the types of read-only memory?
1) Mask ROM (MROM): The content cannot be changed after leaving the factory.
2) PROM: programmable read-only memory, which can be programmed at one time;
3) EPROM: Erasable read-only ROM and irradiate with ultraviolet rays;
4) EEPROM: Electrically erasable read-only ROM.
6) FLash Memory: non-volatile memory using EEPROM.
11. The capacity of a single-chip memory chip is limited and it is difficult to meet actual needs. Therefore, several memory chips must be connected together to form a memory of sufficient capacity.
Memory expansion usually includes bit expansion and word expansion. What is word expansion and what is bit expansion? Please give an example and brief description
1) Bit expansion: Increase the word length of the memory, for example, two 1K*4-bit memory chips form 1 1K*8-bit memory;
2) Word expansion: Increase the number of words in the memory, for example, two 1K*8-bit memory chips form 1 2K*8-bit memory;
Usually, word expansion and bit expansion are used in a mixed way.
12. Be careful to master the expansion of memory, including address space allocation, address line connection, data line connection, chip selection signal generation and connection, etc.;
See page P94, Example 4.1
13. Assume that the binary code to be detected is n bits, in order to have 1 bit error correction ability, a K bit detection bit needs to be added to form a n+k bit code. Question, how many detection bits should be added?
The number of detection bits to be added: 2 is greater than or equal to n+k+1 to the power of k.
Because to make it have 1-bit detection capability, k-bits must be used to explain which bit n+k is wrong. The number of k-bits that can be expressed is 2 to the power of k, and which bit n+k is exactly which bit n+k is exactly
There is an error or all of them are correct, and there are a total of n+k+1 conditions. Therefore, the value of k needs to meet: 2 is greater than or equal to n+k+1
14. For Hamming code, you should be proficient in the encoding method of Hamming code (according to the principle of spouse or odd-matching), and give Hamming code to obtain the original information to be transmitted (including the error correction process).
15. Three ways to improve the speed of memory access.
1) Use high-speed components;
2) Adopt storage hierarchy: cache-main memory structure;
3) Adjust the main memory structure: including two methods: single-body multi-word and multi-body parallelism.
16. Briefly describe the working principle and its advantages of a single-body multi-word storage system.
1) The single multi-word storage system accesses multiple CPU words at one time, that is, the storage word is n times the CPU words (assuming that n CPU words are retrieved in one visit).
2) Advantages are: significantly improve memory bandwidth.
17. What are the two addressing methods for multi-body parallel systems? Please briefly explain its addressing method and its advantages.
1) High-bit cross-addressing method: The addressing method of the memory bank is sequential storage, that is, after one memory bank is full, it is stored in the next one; the high bit of the memory unit address is the number of the memory bank.
High-bit cross-addressing cannot improve the speed of single memory access, but it can enable multiple applications to access memory in parallel and improve the concurrency of the system.
2) Low-bit cross-addressing method: The addressing method of the memory bank is cross-storage. That is, the program is continuously stored in adjacent storage banks. The low bit of the memory cell address is the number of the memory bank.
Low-bit cross-addressing can significantly improve the speed of single memory access.
19. In four-bit low-bit cross-addressing, assuming that the access period is T and the bus transmission period is τ, what conditions should be met in order to realize pipeline storage? If you read four words in succession, how much time will it take?
1）T= 4τ
2) Read four words in succession, the time required is T + (4-1)τ
Note: Assume that it is not a low-bit cross-addressing, but a high-bit cross-addressing, the time required to continuously read four words is still 4T.
20. Everyone needs to master the calculation method of memory bandwidth in the case of high-bit cross-addressing (sequential storage) and low-bit cross-addressing (cross storage).
21. Reasons for introducing cache between CPU and memory.
1) Avoid CPU empty I/O storage access;
2) Alleviate the problem of mismatch between CPU and main memory speed.
22. What is the principle of locality of a program.
The CPU accesses instructions or data from the main memory for a certain period of time, only accesses the main memory local address area.
23. Calculation of Cache hit rate, average access time and access efficiency.
24. What are the two ways to write Cache?
1) Direct writing method: write operations both into the cache and main memory;
2) Write back method: only write data to the cache without writing to the main memory, and only write to the main memory after the data in the cache is replaced.
25. Mapping the main memory address to the Cache address is called address mapping. What are the common Cache mapping methods?
Direct mapping, full-associated mapping, group-associated mapping.
26. What are the advantages and disadvantages of direct mapping?
Advantages: Fast address conversion speed. Disadvantages: The cache utilization rate is not high and the block conflict rate is high;
27. What are the advantages and disadvantages of fully connected mapping?
Advantages: High cache utilization rate and low block conflict rate. Disadvantages: Address transformation is complex and requires more hardware.
28. Everyone needs to master various mapping methods to write down the main memory address format, cache address format, and conversion of main memory address to cache address.
29. What are the commonly used replacement algorithms in Cache? Which hits the highest rate?
1) First-in, least used algorithms and random replacement algorithms in the near future;
2) The highest hit rate is the least used algorithm in the near future;
30. What are the three-address structures of the disk?
Cylinder, head number and sector number
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Chapter 5 Input and Output System
1. What are the four stages of the development of I/O systems?
1) Early stage (dispersed connections, serial work, program query)
2) Interface module and DMA stage (bus connection, parallel operation, interruption and DMA)
3) Channel stage (channel is a processor with special functions)
4) I/O processor stage
The development of I/O systems is actually a process of gradually liberating CPUs from heavy I/O work;
2. What are the two ways to address I/O device? What are the advantages and disadvantages of each?
1) Unified addressing method: Uniform addressing with memory, the I/O address is part of the memory address; no dedicated I/O instructions are required, but they occupy memory space.
2) Independent addressing method: separate addressing from the storage address, special I/O instructions are required.
3. What are the contact information between I/O devices and hosts?
When interacting with information between I/O devices and hosts, they must understand each other's status. According to the working speed of I/O devices, it can be divided into three categories:
1) Immediate response: Applicable to slow devices regardless of its status (that is considered to be ready at all times).
2) Response signal: interact through the response signal;
3) Synchronous time scale: Use a unified clock signal.
4. What are the four types of I/O buses?
Data line, device selection line, status line, command line
5. I/O devices usually use D triggers (complete triggers) and B triggers (work triggers) to identify the state of the device.
D=0, B=0: pause status;
D=0, B=1: Ready state
D=1, B=0: Ready state
6. Basic working principle of program query.
The CPU constantly checks the status of the I/O device, causing the CPU and I/O device to work serially.
7. What is interruption?
When the computer executes the program, when an exception is cleared or special request occurs, the computer stops the running of the current program and turns to process these abnormal cleared or special requests. After the processing is completed, it returns to the interruption of the current program and continues to execute the original program, which is an interrupt.
8. What are the four parts of the basic process of interrupting service procedures?
1) Protect the site
2) Interrupt service
3) Recover the site
4) Interrupt return
9. What are single-point interrupts and multiple interrupts?
1) Single-fold interrupt: The current interrupt service procedure is not allowed;
2) Multiple interrupts: allows higher-level interrupt sources to interrupt the current interrupt service program, also known as interrupt nesting;
10. The timing of the CPU response interruption?
After the current instruction is executed, the CPU sends an interrupt query signal, that is, the interrupt response must be performed after each instruction is executed, and it is impossible to respond to interrupts during the instruction execution.
11. What is DMA?
DMA: Direct memory access. Establish an independent bus connection between main memory and I/O devices.
12. In the DMA method, since the DMA interface shares main memory with the CPU, there may be a conflict between the two competing for main memory. In order to resolve the conflict, what three working methods are usually used when DMA and main memory exchange data?
1) Stop CPU access to main memory: DMA memory access priority is high;
2) Periodic misappropriation (steal): DMA misappropriates storage or steals one or several main storage access cycles;
3) DMA and CPU alternate access: divide the CPU working cycle into two parts, part for DMA access, and part for CPU access.
13. What three parts does the DMA work process include?
1) Pre-processing
2) Data transmission
2) Post-processing
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Chapter 6 Computer operation method
1. Master the calculation method of the signed number and find the true value through the original code;
2. Master the method of compensating the complement code, and the method of finding the original code through complement code and then finding the true value.
1) Find the complement code through the original code: the symbol bit remains unchanged, everyone takes inverse, and the last bit is added 1;
2) Find the original code through complement code: the symbol bit remains unchanged, everyone takes inverse, and the last bit is added 1;
3. There are 2 representation methods for 0 in the original code (positive zero and negative zero), and there is only one representation method for 0 in the complement code (positive zero and negative zero are consistent)
4. Suppose that the number of bits of the symbol is 8 (including the symbol bits), the range of truth values that the complement code can represent?
The true value range that can be represented by the complement code is -128~+127 (see the complement code definition)
5. Master the methods of inverse code and shift code.
6. What is a fixed-point representation? What is a floating point representation?
1) Fixed point representation: the number where the decimal point is fixed at a certain position is a fixed point number;
2) Floating point represents: a number where the decimal point can float.
7. What parts does the representation of floating point numbers in a machine consist of?
It consists of four parts: mantissa, number, order code, and order symbol.
8. Master the calculation method of the standardized floating-point number representation range (maximum positive number, minimum positive number, maximum negative number, minimum negative number).
9. What parts does the floating point number specified in the IEEE754 standard consist of?
It consists of number characters, order codes (including order characters) and mantissa.
10. In the floating point numbers specified in the IEEE754 standard, what form does the order code and mantissa be represented in?
The order code is represented by a shift code, its offset is 2^(n-1), and the mantissa is represented by the original code.
11. How many places does float occupy? How many places does double occupy?
float is a short real number, accounting for 32 bits, including 8 bits of the order code and 23 bits of the mantissa.
The double is a real number, accounting for 64 bits, of which the order code occupies 11 bits and the mantissa is 52 bits.
12. Perform arithmetic shifts on positive numbers. When the positive numbers use source code, complement code, and reverse code, when shifting left or right, what code is added to the low or high position?
For positive numbers, the source code, complement code, and inverse code are all equal to the true value. When shifting left, 0 is added to the low position, and when shifting right, 0 is added to the high position.
13. Perform arithmetic shifts on negative numbers. When negative numbers use source code, complement code, and reverse code, when shifting left or right, what code is added to the low or high position?
For source code, when moving left or right, both the low or high positions are added to 0;
For complement: when moving left, add 0 at the low position, and when moving right, add 1 at the high position
For inverse code: when shifting left or right, add 1 to both the low or high;
14. What is logical shift?
Logical shift is a shift to an unsigned number. Since there is no sign bit in the unsigned number, when shifting left, the high displacement is lost and the low displacement is filled with zero. When moving right, the low displacement is lost and the high position is zero.
15. Under what circumstances can overflow occur during addition and subtraction? How to simply judge that an overflow occurs?
1) When adding positive numbers to positive numbers, decreasing negative numbers, adding negative numbers to negative numbers, and decreasing negative numbers to positive numbers, overflow may occur.
2) If the two numbers participating in the operation are the same (addition converted into complement), the result is different from the source operand symbol, which is an overflow.
3) If the complement uses a 1-bit sign bit, if the carry of the most significant bit and the carry of the sign bit are different, an overflow occurs.
16. Can fixed-point multiplication operations be implemented using addition and shift?
Can.
17. What steps are basically carried out in floating point addition and subtraction operations?
1) Order: align the decimal points;
2) Sum of mantissa: sum the two mantissa after the order according to fixed-point addition and subtraction operations;
3) Standardization: standardization of the mantissa;
4) Rounding: When the mantissa is right, the numerical bits are lost;
5) Overflow judgment: determine whether the result is overflowing.
18. How to determine whether the floating-point operation result overflows?
Whether the order code is beyond its representation range. (Use 2 symbol bits to determine overflow)
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Chapter 7 Command System
1. What are machine instructions? What is a command system?
1) Machine instructions: each machine language statement;
2) Instruction system: a collection of all machine instructions.
2. What two main parts does an instruction contain? Please briefly explain the functions of each part.
1) Operation code: Indicates the operation to be completed by the instruction;
2) Address code: Indicate the data or data source to which the instruction is to be operated;
3. The length of the operation code is available in fixed length and variable length. What are the advantages of each?
1) Fixed length: easy to design hardware, short instruction decoding time;
2) Variable length: compressed the average length of the opcode;
4. What devices can the address in the address code in the instruction be the address of which device?
It can be the main memory address, register address, or address of the I/O device;
5. How many addresses can be found in the instruction?
Four addresses, three addresses, two addresses, one addresses and zero addresses.
6. Suppose there are four addresses, three addresses, two addresses and one address in the instruction, how many times do each need to be retrieved?
1) Four addresses: 4 accesses;
2) Three addresses: 4 accesses;
3) Two addresses: 3 accesses;
4) One address: 2 accesses;
7. What are the advantages when registers are used instead of address code fields in the instruction word?
1) Expand the addressing range of instruction words;
2) Shorten the length of the command word;
3) Reduce the number of memory accesses
8. Why should data be aligned according to boundaries when stored in memory?
Reduce the number of memory accesses.
9. What are the two types of addressing methods?
1) Instruction addressing: the instruction address of the next instruction to be executed;
2) Data addressing: Determine the operand address of this instruction.
10. What is a formal address? What is a valid address?
1) Formal address: The address code field of the instruction usually does not represent the real address of the operand, and becomes the formal address and is denoted as A;
2) Valid address: The real address of the operand, denoted as EA, is determined by the addressing feature and formal address;
11. Understand the concepts of various addressing methods and the way to form effective addresses based on formal addresses.
Immediate addressing, direct addressing, implicit addressing, indirect addressing, register addressing, register indirect addressing, base addressing (implicit or explicit), indexed addressing, relative addressing, stack addressing
12. What is RISC? What is CISC?
RISC: thin instruction set;
CISC: Complex instruction set;